Intel adds 64bits to Xeon

Intel's long-rumoured Itanium back-up plan is made official

Written by Roger Howorth in San Francisco

Intel last week announced that it will add 64bit address extensions to its Xeon line of x86 compatible processors.

The development, called Clackamas Technology (CT), will bring capabilities that were previously reserved for expensive systems to more affordable servers and workstations, and will reduce the competitive edge of AMD's comparable Opteron chip.

Speaking at the Intel Developer Forum in San Francisco, Craig Barrett, Intel's chief executive, said the features will be included in Xeon processors due to ship next quarter. He also confirmed that the new 64bit support is compatible with the 64bit extensions used by AMD in its Opteron processors, so companies should be able to use the same Windows and Linux software on the new 64bit Xeons and systems built with AMD's Opteron chips.

"Offering a broad line-up of solutions means that when combined with the Itanium processor family - which is designed specifically for business-critical high-end servers and technical computing - we can provide leadership solutions from top to bottom in a variety of 64bit and 32bit configurations," said Barrett.

The main benefit of 64bit technology is that it allows computers to efficiently access extremely large amounts of RAM - the efficient working of 32bit systems is limited to 4GB of RAM.

Barrett said the features would be included in future versions of the Prescott chip. Prescott is the codename for the new version of the Pentium 4 chip that is made using a 90nm manufacturing process and includes an extended instruction pipeline.

Launched in February, Prescott has received a mixed reception because of concerns that the new pipeline can restrict performance gains, and due to other concerns over the chip's power consumption.

The 64bit extensions will also be included in the Nocona version of Xeon. Intel previously announced that Nocona will be the first Xeon chip to support an 800MHz front side bus, and will be launched this summer.

Experts said the new high-speed bus will be particularly important for systems fitted with large amounts of RAM.

Some analysts said Intel's move was an attempt to catch up with its chief rival, AMD, which already offers 64bit capabilities in its high-end 32bit chips. Barrett said that the new extensions would allow companies to continue to run their existing 32bit software as they transition their applications to run in 64bit systems.

The firm also outlined its Itanium roadmap at the forum. The forthcoming Madison 9M Itanium 2 chip will run a 9MB cache. Later in 2004, Intel will ship Fanwood with 3MB cache, designed for the mainstream two-way as well as low-voltage markets. In 2005, Montecito will integrate two processor cores on a single die.

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